Many storage, networking, and embedded applications require fast input/output (I/O) throughput for optimal performance. I/O processors allow servers, workstations, and storage subsystems to transfer data faster, reduce communication bottlenecks, and improve overall system performance by offloading I/O processing functions from a host central processing unit (CPU).
Typically, the CPU(s) in the I/O processors program direct memory access (DMA) controller(s) to move data between specified sources and destinations, such as between local memory and host memory. Once the DMA controller is programmed, it will generate a read command to the source's interface or controller. This controller or interface will generate the read command for the source, and once it obtains the read data will place that data on the bus to the DMA controller. Typical DMA controllers include buffers to temporarily store data when the data is moved between sources and destinations, such as between host and local memories. The DMA controller will accept the read data and store it in the DMA controller data buffers. At this time, the DMA controller will generate a write command to the destination's interface or controller. The destination interface or controller will accept this write command. Finally, the DMA controller provides the write data being stored in the DMA controller data buffers to the destination interface or controller in order to be written to the destination.
The use of DMA controller data buffers can lead to increased area requirements, increased power requirements, and added complexity to the I/O processor. The use of DMA controller data buffers also slows down performance and increases costs for I/O processors.